Exchangeable hierarchical data line structure

Static information storage and retrieval – Addressing – Plural blocks or banks

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365 63, G11C 800

Patent

active

055463495

ABSTRACT:
An exchangeable hierarchical data line structure includes a first half of a unit circuit, a second half of a unit circuit and a common sense amplifier row disposed therebetween. The common sense amplifier row includes a common plurality of sense amplifiers and a common local data line. The structure includes a first set of master data lines with a first master data line and a third master data line, and a second set of master data lines with a second master data line and a fourth master data line. The master data lines form a master bus transversing the direction of the common local data line. The structure includes first switch circuitry to selectively couple signals between the common local data line and the first master data line. The structure includes second switch circuitry to selectively couple signals between the common local data line and the second master data line. A signal on the common local data line is couplable to the first master data line when the signal on the common local data line is not coupled to the second master data line, and the signal on the common data line is couplable to the second master data line when the signal on the common local data line is not coupled to first master data line.

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