Event detection with a digital processor

Pulse or digital communications – Systems using alternating or pulsating current

Reexamination Certificate

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Details

C327S218000, C713S176000

Reexamination Certificate

active

06931075

ABSTRACT:
A bistable memory device changes logic state each time an event occurs. The bistable memory device has an logic output coupled to a digital processor input. The digital processor reads the logic state of the bistable memory device from its logic output and compares the logic state read to a stored previous logic state obtained from a previous read. If the logic state read and the stored previous logic state are the same, then no event has occurred during the time between the read and previous read of the logic states of the bistable memory device. If different, then an event has occurred during the time between the read and previous read of the logic states of the bistable memory device. The event detection may be used in combination with a digital system communicating by serial digital data transmissions.

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PCT International Search Report with Notification of Transmittal of International Search Report, PCT/US 02/10195, 8 pages.

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