Coded data generation or conversion – Converter calibration or testing
Reexamination Certificate
2001-08-08
2002-11-05
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Converter calibration or testing
C341S144000
Reexamination Certificate
active
06476742
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an evaluation system for evaluating the performance of an analog-digital converter (A-D converter) which converts an analog signal into a digital signal or a digital-analog converter (D-A converter) which converts a digital signal into an analog signal, and more particularly, to a performance evaluation system for evaluating the effective number of bits of an A-D converter or D-A converter which is implemented by a single semiconductor integrated circuit or a combination of a plurality of semiconductor integrated circuits.
2. Description of the Related Art
A method of evaluating an A-D converter (hereinafter, referred to as ADC) is categorized into a static characteristic evaluation method and a dynamic characteristic evaluation method. According to the static characteristic evaluation method, a precisely defined direct current (dc) voltage is applied to an ADC which is a device under test (DUT), and a response from the ADC is observed, and thereafter, “a difference between the transition voltage of an actual ADC and the transition voltage of an ideal ADC” is estimated in a computer or the like using the differential nonlinearity (DNL) or the like.
The differential nonlinearity (DNL) in this case is a result of the comparison of a difference (actual step width) between the upper limit amplitudes of an analog signal which causes an ADC to output adjacent quantized codes therefrom when applied to the ADC, with an ideal step width which corresponds to 1 LSB, and enables a localized fault or defect which depends on a particular code to be detected. That is, DNL for an ADC is defined as follows:
DNL=A
in
(
Q
m+1
)−
A
in
(
Q
m
)−1
[LSB]
(1)
where Q
m+1
and Q
m
are two adjacent quantized codes and A
in
(Q
n
) is the upper limit of the amplitude of an analog signal which corresponds to the quantized code Q
n
. For example, if “the difference between adjacent transition amplitudes” remains constant and equals the step size (width) corresponding to 1 LSB, then DNL is zero.
However, the static characteristic evaluation method cannot measure or determine the nonlinearity of an ADC which is a device under test which depends on the frequency of a signal to be applied to the ADC.
According to the dynamic characteristic evaluation method, a periodic signal is applied to an ADC which is a device under test, and a response from the ADC is observed, and thereafter, “a difference between the transition voltage of an actual ADC and the transition voltage of an ideal ADC” is estimated in a computer or the like.
This method has an advantage that a characteristic which closely approximates an actual operation of the ADC to be tested can be estimated. Particularly, dynamic characteristic evaluation techniques which utilize a sine wave (sinusoidal wave) as an input signal include a histogram approach, an FFT approach and a curve fitting approach as mentioned below.
(a) In the histogram approach, a histogram is plotted against each quantized code from a digital waveform of the response from the ADC. A difference between the histogram of an actual ADC and the histogram of an ideal ADC is then determined and divided by the histogram of the ideal ADC to estimate DNL. The normalization of the difference in the histograms or its division by the histogram of the ideal ADC accounts for a non-uniform distribution of the sine wave histogram.
(b) In the FFT approach, a digital signal representing the response of the ADC is Fourier transformed as by FFT (fast Fourier transform), and is separated in the frequency domain into a signal (namely, a frequency spectrum of the sine wave applied) and noises (namely, a spectrum of quantization noises or a sum of spectra other than the frequency of the sine wave applied), thus determining a signal-to-noise ratio (SNR).
For example, as shown in
FIG. 17A
, a sine wave signal from a sine wave generator
11
is passed through a low pass filter (LPF)
12
to eliminate unwanted components therefrom before it is fed to a sample-and-hold circuit
13
where the sine wave signal is sampled periodically and held therein for feeding to an ADC
14
under test. A response output from the ADC
14
is fed to an FFT unit
15
where it is subject to the fast Fourier transform to be transformed into a signal in the frequency domain, which is then fed to an SNR estimator
16
. On the basis of a result of the FFT as illustrated in
FIG. 17B
, the SNR estimator
16
determines the signal-to-noise ratio SNR by dividing the sine waveform signal component G
ss
(f
0
) by the noise component:
∑
f
≠
f
0
G
nn
(
f
)
If the quantization noise increases in the ADC
14
because of fault, the signal-to-noise ratio SNR is degraded, increasing the number of bits among the total number of bits in the ADC
14
which are influenced by the quantization noise. It is then possible to estimate the effective number of bits (ENOB) of the tested ADC on the basis of the signal-to-noise ratio observed. The effective number of bits (ENOB) of the tested ADC can be given by the following equation (2).
ENOB
=
SNR
[
dB
]
-
1.76
6.02
[
bits
]
(
2
)
In this case, by changing the frequency f
0
of the sine wave signal applied, the frequency dependency of ENOB can be measured or determined.
(c) In the curve fitting approach using the sine wave, parameters (such as frequency, phase, amplitude, offset etc.) of an ideal sine wave are chosen so that the square error between a sampled digital signal and the ideal sine wave is minimized. An rms (root-mean-square) error determined in this manner is compared against the rms error of the ideal ADC having the same number of bits to estimate the effective number of bits.
Means for generating an analog signal such as a sine wave is described in detail in “Theory and Application of Digital Signal Processing” by Lawrence R. Rabiner and Bernard Gold; Prentice-Hall, 1975, in particular, “9.12: Hardware realization of a Digital Frequency Synthesizer”, for example.
A problem with the use of the histogram approach mentioned in the above paragraph (a) to estimate the DNL of an ADC with a high precision is a very long time needed for the determination. By way of example, an estimation of the DNL for an 8-bit ADC with a reliability of 99% and for an interval width of 0.01 bit requires 268,000 samples. For a 12-bit ADC, as many as 4,200,000 samples are required. (See, for example, “Full-Speed Testing of A/D Converters” by Joey Doernberg, Hae-Seung Lee and David A. Hodges, IEEE Journal of Solid-State Circuits, Vol. SC-19, No. 6, pp. 820-827, 1984.) When the ADC under test exhibits hysteresis, it is likely that any fault therein cannot be detected by using the histogram approach.
Here it is assumed that when an input signal crosses a given level with a positive gradient, a corresponding code width is enlarged, increasing the number of observations, while when the input signal crosses the given level with a negative gradient, the corresponding code width shrinks, decreasing the number of observations.
According to the histogram approach, no distinction is made in the direction in which the input signal changes, and accordingly, the number of observations for the positive gradient and the number of observations for the negative gradient are added together in the number of observations. As a result, an increase and a decrease in the number of observations cancel each other, and the code width will be one close to a code width for a fault-free ideal ADC. (See, for example, “Classical Tests are inadequate for Modern High-Speed Converters” by Ray K. Ushani, Datel Application Notes AN-5, 1991.) As a consequence, the DNL which can be estimated with the histogram approach is a result of comparison of a difference in mean values of output code width against the ideal step size corresponding to 1 LSB. In addition, there must be a relationship other than an integral multiple between the frequency of the input sine wave and the sampling frequen
Advantest Corporation
Gallagher & Lathrop
Lathrop David N.
Wamsley Patrick
LandOfFree
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