Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
2002-07-05
2004-10-05
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S754000
Reexamination Certificate
active
06800564
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to an etching solution for a signal wire, and a method of fabricating a TFT array panel with the same.
(b) Description of the Related Art
Generally, a signal wire for a semiconductor device or a display device is used as a medium for signal transmission and hence, it is required to prevent the signal wire from causing any delay in the signal transmission.
For that purpose, the signal wire may be formed of a low resistivity conductive material such as silver (Ag), which exhibits the lowest resistivity. However, when using silver or silver alloy, it is difficult to pattern the target layer by way of photolithography based on a mask.
Meanwhile, a liquid crystal display (“LCD”), one of the most extensively used flat panel displays, has two panels with electrodes, and a liquid crystal layer interposed therebetween. Voltages are applied to the electrodes so that the liquid crystal molecules in the liquid crystal layer are re-oriented to thereby control the light transmittance.
The most prevalent one of the LCDs is one having two panels respectively having the electrodes and thin film transistors (“TFTs”) for switching the voltages applied to the electrodes. The TFTs are provided on one of the panels, called a “TFT array panel”.
The LCD is classified into a transmissive type displaying images by transmitting light from a specific light source such as a backlight through a transmitting layer such as a transparent conductive material-based pixel electrode made of, and a reflective type displaying images by reflecting ambient light such as natural light with a reflecting layer such as a reflective conductive material-based pixel electrode.
The reflective type LCD has lower power consumption since it does not use a separate light source, while shows relatively poor image quality since it displays the image only using the light reflected by the reflecting layer. In order to improve the poor image quality, it is preferable that the reflecting layer is made of a material with high reflectance such as silver, silver alloy, aluminum, and aluminum alloy.
However, even though the silver or silver alloy has a reflectance about 15% higher compared with the aluminum or aluminum alloy to improve the visibility, it is difficult to pattern such a layer through the usual photolithography process. Therefore, the silver-based layer may not be used as a reflecting layer.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an etching solution adapted for finely patterning a signal wire, and a method of forming a signal wire using the etching solution.
It is another object of the present invention to provide a method of fabricating a TFT array panel for a reflective type LCD with a well-patterned reflecting layer.
In the process of fabricating a signal wire and a TFT array panel with a signal wire according to the present invention, silver or silver alloy conductive layer is patterned using an etching solution containing phosphoric acid, nitric acid, acetic acid and potassium peroxymonosulphate (“oxone”), or an etching solution containing phosphoric acid, nitric acid, acetic acid and ethylene glycol.
It is preferable that the etching solution contains phosphoric acid of 40-60%, nitric acid of 1-10%, acetic acid of 5-15%, and potassium peroxymonosulphate of 1-5%, or contains phosphoric acid of 10-30%, nitric acid of 5-15%, acetic acid of 10-30%, and ethylene glycol of 1-10%. The silver alloy contains silver for a basic material, and alloy contents of 0.01-20 atomic % such as Pd, Cu, Mg, Al, Li, Pu, Np, Ce, Eu, Pr, Ca, La, Nb, Nd and Sm. The silver alloy may contain two elements or three elements with one or two of the alloy contents.
Such an etching solution and a fabricating method using such an etching solution may be adapted for a method of fabricating a TFT array panel.
In a method of fabricating a TFT array panel according to the present invention, a gate wire is formed on an insulating substrate. The gate wire has a plurality of gate lines, and a plurality of gate electrodes connected to the gate lines. A gate insulating layer and a semiconductor layer is deposited in sequence, and a data wire is formed thereafter. The data wire has a plurality of data lines intersecting the gate lines, a plurality of source electrodes connected to the data lines and placed close to the gate electrodes, and a plurality of drain electrodes facing the source electrodes around the gate electrodes. A protective layer is deposited and patterned to form a plurality of first contact holes exposing the drain electrodes. A silver or silver alloy conductive layer is deposited on the protective layer. The conductive layer is patterned using an etching solution with phosphoric acid, nitric acid, acetic acid, potassium peroxymonosulphate and ultra-pure water or an etching solution with nitric acid, acetic acid, phosphoric acid, ethylene glycol and ultra-pure water to thereby form a reflecting layer. The reflecting layer is connected to the drain electrodes through the first contact holes.
The thickness of the conductive layer is preferably in the range of 1,000-3,000 Å, or in the range of 300-600 Å. It is preferable that the protective layer is made of a photosensitive organic material.
The gate wire may further include a plurality of gate pads for receiving scanning signals from an external source and transmitting the scanning signals to the gate lines. The data wire may further include a plurality of data pads for receiving image signals from the outside and transmitting the image signals to the data lines. The protective layer may have a plurality of second and third contact holes respectively exposing the data pads and the gate pads together with the gate insulating layer. A plurality of subsidiary gate and data pads made of the same layer as the reflecting layer may be further formed, and the subsidiary gate and data pads are electrically connected to the gate and the data pads through the second and the third contact holes, respectively.
REFERENCES:
patent: 4455364 (1984-06-01), Sasa
patent: 6486108 (2002-11-01), Yates et al.
patent: 2003/0071309 (2003-04-01), Yamanaka et al.
Kang Sung-Chul
Park Hong-Sick
Coleman W. David
F. Chau & Associates LLC
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