Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1995-09-20
1998-06-09
Breneman, R. Bruce
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438715, 438906, 438935, 134 12, 156345, C23F 102
Patent
active
057633266
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to an etching process for cleaning laterally exposed p-n junctions of semiconductor elements, especially power diodes, after the semiconductor chip in question has been provided with connection elements, for example by soldering them together, and to an apparatus for carrying out the process.
BACKGROUND INFORMATION
The fabrication of, for example, power diodes conventionally involves, after the cold base, the diode chip and the top wire have been soldered together, a cleaning operation, by silicon removal, of the p-n junctions of the diode chip, which up to this point are still laterally exposed, by means of a wet-chemical alkaline etching process, e.g., by means of aqueous KOH, in order to develop the blocking ability of the p-n junctions. This known process has the drawback that the lateral silicon removal takes place as a function of doping and crystal orientation, so that the etching contours produced differ greatly in the various doping regions in how pronounced they are. Moreover, capillary effects may arise as a function of the shape of the connection elements. Furthermore, the etching solution is prone to external contamination, and there is a concentration, temperature and agitation dependence and a dependence on electrochemical potential differences specific to the etching system. In addition, this wet-chemical etching process is very complicated, owing to the numerous rinsing processes required. These drawbacks as a whole, particularly in mass production, again and again lead to considerable losses in yield, whose causes are very difficult to find, owing to the large number of mechanisms involved.
While plasma etching processes are known in semiconductor technology, they are employed almost exclusively in the production of wafers.
It is an object of the present invention to provide an etching process of the type mentioned at the outset and an apparatus for carrying it out, by means of which process improved etching contours can be achieved independent of the doping profile of the laterally exposed semiconductor chips.
SUMMARY OF THE INVENTION
The plasma etching process according to the present invention, for the purpose of cleaning the laterally exposed p-n junctions of semiconductor elements, has the advantage, compared with the wet-chemical alkaline etching process, that the achievable etching contours on the individual component are far superior to those in the case of wet etching, the chip edge formed, in particular, running almost vertically in the case of plasma etching.
This advantage of the plasma etching process according to the present invention makes it possible even to treat diodes having very shallow (i.e., situated close to the connection elements) p-n junctions which are very inadequately dealt with in the course of wet etching. Typical depths in the process are 10-20 .mu.m. The main reason for these advantages is that the plasma etching process is largely independent of orientation and doping. Because the numerous rinsing processes are dispensed with, the plasma etching process is particularly suitable for mass production, and the yield can even be improved, compared with the wet--chemical etching process, if process parameters are suitably chosen.
The etching gases employed include, for example, nitrogen fluorides, sulfur fluorides or carbon fluorides, especially CF.sub.4, SF.sub.6 or NF.sub.3.
An advantageous implementation of the etching process according to the present invention includes in the etching gas, which has been ionized by the injection of high-frequency electro-magnetic waves, especially microwaves, being supplied in a plasma reaction vessel to the semiconductor elements to be cleaned. In this arrangement, the etching gas flows through the plasma reaction vessel at a pressure of preferably 0.1-10 mbar.
So as to carry out the thermally activated etching operation as quickly and optimally as possible, the semiconductor elements are expediently heated to a temperature below the melting point of the solder nea
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Alanko Anita
Breneman R. Bruce
Robert & Bosch GmbH
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