Etching method, semiconductor and fabricating method for the...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S723000, C438S724000

Reexamination Certificate

active

06632746

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method for etching an organic/inorganic hybrid film represented by SiC
x
H
y
O
z
(x>0, y≧0, z>0), a semiconductor device having an interlayer insulating film made of the organic/inorganic hybrid film, and a fabricating method for such a semiconductor device.
Recent semiconductor integrated circuit devices adopt multilayer interconnection structures to meet requests for size scale-down and higher integration. Conventionally, a silicon oxide (SiO
2
) film has been used as an interlayer insulating film provided between lower interconnections and upper interconnections. Contact holes are formed through such an interlayer insulating film by plasma etching for connection with lower interconnections when a multilayer interconnection structure is adopted.
Hereinafter, as a first conventional example, an etching method for formation of contact holes through an interlayer insulating film made of a silicon oxide film will be described with reference to FIGS.
22
(
a
) to
22
(
d
).
First, as shown in FIG.
22
(
a
), a lower interconnection
12
made of copper, for example, is formed in an insulating film
11
deposited on a semiconductor substrate
10
by a known method. On the lower interconnection
12
, deposited is an etching stopper film
13
made of a silicon nitride (Si
3
N
4
) film, for example, that has the function of preventing the lower interconnection
12
from oxidizing during etching and also stopping the etching. An interlayer insulating film
14
made of a silicon oxide (SiO
2
) film is deposited on the etching stopper film
13
. A resist pattern
15
having an opening for formation of a contact hole is then formed on the interlayer insulating film
14
. Note that, although illustration is omitted, the sides and the bottom of the lower interconnection
12
are normally coated with barrier metal.
Thereafter, as shown in FIG.
22
(
b
), a contact hole
16
is formed through the interlayer insulating film
14
using the resist pattern
15
as a mask by plasma etching with an etching gas containing fluorine and carbon, such as CF
4
gas, C
2
F
6
gas, C
3
F
8
gas, CHF
3
gas, C
3
F
8
gas, or C
4
F
8
gas.
As shown in FIG.
22
(
c
), the resist pattern
15
is removed by ashing with oxygen plasma. As shown in FIG.
22
(
d
), the portion of the etching stopper layer
13
exposed in the contact hole
16
is removed.
In recent years, further scale-down and higher integration of multilayer interconnection structures have been demanded, and with realization of this demand, signal delay at interconnections has become greatly influential to the operation speed of a semiconductor integrated circuit.
In order to reduce signal delay at interconnections, it has been proposed to use a film having a low dielectric constant (∈=2 to 3) as the interlayer insulating film. As such a film having a low dielectric constant, known are an organic insulating film containing an organic compound as a main component, a fluorine-containing insulating film made of a fluorine-containing silicon oxide (SiOF), and an organic/inorganic hybrid film represented by SiC
x
H
y
O
z
(x>0, y≧0, z>0). Japanese Laid-Open Patent Publication No. 10-125674 proposes an organic/inorganic hybrid film made of a silicon oxide film containing carbon and hydrogen, deposited by feeding hexamethyldisiloxane (HMDSO) as a material gas.
The organic insulating film, of which the composition is similar to that of a resist film, has the following problem. When a resist pattern formed on the organic insulating film is to be removed by ashing with oxygen plasma, the organic insulating film itself is damaged by the oxygen plasma. The fluorine-containing insulating film has the problem that it easily comes off due to its poor adhesion to an underlying film and also it is poor in mechanical strength and heat resistance.
The organic/inorganic hybrid film has a specific dielectric constant considerably smaller than the fluorine-containing insulating film and has a mechanical strength roughly equal to that of the fluorine-containing insulating film. Moreover, the organic/inorganic hybrid film, of which the composition is not similar to that of a resist film, is less damaged by oxygen plasma, and therefore, the resist pattern can be removed by ashing with oxygen plasma.
In consideration of the above, the organic/inorganic hybrid film is promising as an interlayer insulating film having a low specific dielectric constant.
With the recent demand for size scale-down and higher integration of semiconductor integrated circuit devices, also, the diameter of contact holes formed through the interlayer insulating film has become finer and the aspect ratio of the contact holes has become larger. It is difficult to fill such fine contact holes having a large aspect ratio with a conductive material with reliability.
To solve the above problem, Japanese Laid-Open Patent Publication No. 8-191062, for example, proposes a technique in which the diameter of the contact holes is made larger near the opening thereof than near the bottom thereof, to facilitate filling of the contact holes with a conductive material.
Hereinafter, as the second conventional example, the etching method disclosed in Japanese Laid-Open Patent Publication No. 8-191062 will be described with reference to FIGS.
23
(
a
) to
23
(
d
). Note that in FIGS.
23
(
a
) to
23
(
d
), illustration of a lower interconnection is omitted.
First, as shown in FIG.
23
(
a
), a resist pattern
15
having an opening
15
a
for formation of a contact hole is formed on an interlayer insulating film
14
made of a silicon oxide film deposited on a semiconductor substrate
10
.
As shown in FIG.
23
(
b
), the interlayer insulating film
14
is subjected to anisotropic dry etching with an etching gas containing fluorine and carbon using the resist pattern
15
as a mask, to form a contact hole
16
to reach partway in the interlayer insulating film
14
.
Isotropic dry etching is then performed for the interlayer insulating film
14
with an etching gas including oxygen gas. By this etching, as shown in FIG.
23
(
c
), an opening
15
a
of the resist pattern
15
is widened, and with this, the diameter of the contact hole
16
is made larger near the opening thereof, to provide a tapered wall at the opening of the contact hole
16
.
As shown in FIG.
23
(
d
), the resist pattern
15
is removed. Although illustration is omitted, by depositing a conductive material on the interlayer insulating film
14
, the contact hole
16
is filled with the conductive material with reliability.
(First Problem)
The plasma etching for forming fine contact holes through an organic/inorganic hybrid film is normally performed with an etching gas containing fluorine and carbon, which can cleave Si—O bonds, as in the plasma etching of a silicon oxide film.
However, when the organic/inorganic hybrid film is etched with the same etching gas under the same conditions as those used for etching of the silicon oxide film, the etching rate largely decreases, or in an extreme case, the etching itself stops. The decrease in etching rate causes reduction in throughput. This also causes reduction in the difference between the etching rate of the interlayer insulating film and that of the resist pattern, failing to secure a sufficiently large etching selection ratio.
By adding oxygen gas to the etching gas, the etching rate of the organic/inorganic hybrid film increases. However, this also facilitates etching of the resist pattern
15
, and thus the etching selection ratio of the interlayer insulating film
14
to the resist pattern
15
decreases.
The addition of oxygen gas to the etching gas also increases the etching rate of the silicon nitride film constituting the etching stopper film
13
. This reduces the etching selection ratio of the interlayer insulating film
14
to the etching stopper film
13
.
Therefore, it is not preferable to add oxygen gas to the etching gas.
In view of the above, the first object of the present invention is pro

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Etching method, semiconductor and fabricating method for the... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Etching method, semiconductor and fabricating method for the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Etching method, semiconductor and fabricating method for the... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3118851

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.