Etching and plasma treatment process to improve a gate profile

Details Etching and plasma treatment process to improve a gate profile Etching and plasma treatment process to improve a gate profile

2003-08-04

2008-11-04

Hendricks, Keith D. (Department: 1794)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S714000, C438S710000, C438S585000, C438S734000, C438S627000, C216S067000

Reexamination Certificate

active

07446050

ABSTRACT:
A method for improving a polysilicon gate electrode profile to avoid preferential RIE etching in a polysilicon gate electrode etching process including carrying out a multi-step etching process wherein at least one of a lower RF source power and RF bias power are reduced to complete a polysilicon etching process and an in-situ plasma treatment with an inert gas plasma is carried out prior to neutralize an electrical charge imbalance prior to carrying out an overetch step.

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