Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-01-31
2002-05-28
Sircus, Brian (Department: 2839)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
Reexamination Certificate
active
06395994
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to Etched Tri-Metal “ETM” electronic circuit assemblies and more particularly to wire traces on the circuit board for bonding to the component attached to the board.
2. Description of the Related Art
In the field of electronics manufacturing, various additive and subtractive processes are known for constructing printed circuit boards (PCBs). Among these is the process disclosed in U.S. Pat. No. 3,801,388 issued on Apr. 2, 1974 to Akiyama et al. which is a subtractive process. The process disclosed in U.S. Pat. No. 4,404,059 issued on Sep. 13, 1983 to Livshits et al is an additive process. The process disclosed in U.S. Pat. No. 5,738,797 issued on Apr. 14, 1998 to Belke, Jr. et al that is assigned to a common assignee is also a subtractive process. All three of these patents are incorporated herein by reference. These patents describe various additive and subtractive plating and chemical etching processes for constructing multi-layer PCBs having air bridges.
Currently tri-metallic materials, as used in the manufacture of PCBs, are a sandwich with aluminum as the middle layer and copper as the top and bottom layers. The layers are typically bonded together with a zinc-bonding layer
The air bridge structures disclosed in these patents are useful in offering design flexibility and printed circuit board real estate savings as far as routing and layout of circuit traces. However, these patents do not discuss using wire structures to make interconnects with wire-bonding techniques. In addition, these patents do not discuss creating composite copper-aluminum wires.
SUMMARY OF THE INVENTION
It is a principal advantage to provide integrated wire traces which can be used to obtain electrical connections to internal input-output, “I/O” devices.
It is yet another advantage to avoid the use of external wires on a PCB when wiring an electrical device to the circuit of the PCB.
Still another advantage is the elimination of bond pads on the circuit of the PCB.
It is still a further advantage to either use a copper wire trace or a composite copper-aluminum wire trace on the PCB.
These and other advantages are found in an etched tri-metal printed circuit board having integrated wire traces for wire bonding integrated circuit devices to the board. The board has a substrate layer for supporting the etched tri-metal material. An etched tri-metal layer has a top, middle and bottom layer, with the bottom layer bonded to the substrate. A circuit pattern is etched in one or more layers of the tri-metal layer, with the pattern having at least one area adapted to expose the surface of at least the middle layer for forming a pocket in the tri-metal layer. The depth of the pocket can extend to the substrate.
A circuit device located in the one area and secured to the exposed surface be it one of the layers of the tri-metal or the substrate. At least one wire trace having at least one of the tri-metal layers is integral with the top layer extending from an adjacent surface to the pocket with a free end of the wire trace extending over a portion of the device and bonded to the device.
In addition, other advantages can be found in a method for forming an etched tri-metal printed circuit board with integrated wire traces for wire bonding integrated circuit devices to the board. The method begins with the step of locating a substrate layer. An etched tri-metal layer having a top, middle and bottom layer is located on the substrate layer. The bottom layer of the etched tri-metal is bonded to the substrate layer.
Next a circuit pattern is etched in or on one or more layers of the tri-metal layer. The pattern has at least one area adapted to expose the surface of at least the middle layer for forming a pocket in the tri-metal layer. A circuit device is located in the one area and the circuit device is bonded to the exposed surface.
At least one wire trace is formed having at least one of the tri-metal layers integral with the top layer from which it is formed. The wire trace extends from an adjacent surface to the pocket with a free end of the wire trace extending over a portion of the device. The wire trace is then bonded to the device.
These and other advantages are to be found in the following detailed description and drawings.
REFERENCES:
patent: 3801388 (1974-04-01), Akiyama et al.
patent: 4404059 (1983-09-01), Livshits et al.
patent: 4676867 (1987-06-01), Elkins et al.
patent: 5016089 (1991-05-01), Fujii et al.
patent: 5198885 (1993-03-01), Ibrahim
patent: 5656830 (1997-08-01), Zechman
patent: 5738797 (1998-04-01), Belke, Jr. et al.
patent: 6208521 (2001-03-01), Nakatsuka
Goenka Lakhi Nandial
Paruchuri Mohan R.
Dinh Phuong KT
MacMillan Sobanski & Todd LLC
Sircus Brian
Visteon Global Technologies Inc.
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