Fishing – trapping – and vermin destroying
Patent
1993-02-11
1994-10-25
Thomas, Tom
Fishing, trapping, and vermin destroying
437 69, 437920, 437978, 148DIG156, H01L 2176
Patent
active
053588924
ABSTRACT:
Active regions on a semiconductor substrate are isolated, whereby an Oxide/Nitride/Oxide sandwich is disposed on a substrate, and a polysilicon layer and a nitride layer are also disposed thereon. The Oxide/Nitride/Oxide sandwich substantially inhibits "pitting" of the substrate when the polysilicon layer is removed.
Method of preventing "pitting" of an underlying substrate through the use of a nitride (or other HF-resistant material) disposed beneath the polysilicon layer of a Poly Buffered LOCOS stack.
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Ghandhi, "VLSI Fabrication Principles", 1983, pp. 479-482 and pp. 495-497.
Toshiyuki Nishihara et al., "A 0.5 um Isolation Technology Using Advanced Poly Silicon Pad LOCOS (APPL)", IEEE, 1988, pp. 100-103.
H. S. Yang et al., "Poly void Formation in Poly Buffer LOCOS Process", Extended Abstracts of the Spring Electrochemical Society meeting, 1992, p. 442.
J. M. Sung, "The Impact of Poly-Removal Techniques on Thin Thermal Oxide Property in Poly-Buffer LOCOS Technology", IEEE Transactions on Electron Devices, Aug. 1991, pp. 1970-1973.
Stanley Wolf, "A Review of IC Isolation Technologies--Part 6", Solid State Technology, Dec. 1992, pp. 39-41.
R. L. Guldi, "Characterization of Poly-Buffered LOCOS in Manufacturing Environment", J. Electrochem. Soc., Dec. 1989, pp. 3815-3820.
Tin-hwang Lin, "Twin-White-Ribbon Effect and Pit Formation Mechanism in PBLOCOS", J. Electrochem. Soc., Jul. 1991, pp. 2145-2149.
M. Ghezzo, "LOPOS: Advanced Device Isolation for a 0.8 um CMOS/BULK Process Technology", Journal of The Electrochemical Society, Jul. 1989, pp. 1992-1996.
Dang Trung
Micron Semiconductor Inc.
Pappas Lia M.
Thomas Tom
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