Etch stop layer for use in a self-aligned contact etch

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257S754000, C257S755000, C257S774000, C438S586000, C438S652000, C438S740000

Reexamination Certificate

active

06861751

ABSTRACT:
A self-aligned contact, and a method for fabricating the same, are provided. A conductive element having an overlying hydrogen silsesquioxane (HSQ)-based dielectric cap is formed over a semiconductor substrate. Dielectric sidewall spacers are then formed adjacent to sidewalls of the conductive element and the HSQ-based dielectric cap. A HSQ-based dielectric layer is formed over the resulting structure, and an inter-layer dielectric layer, such as TEOS, is formed over the HSQ-based dielectric layer. The inter-layer dielectric layer is then etched through a mask having an opening located over a sidewall spacer, a portion of the HSQ-based dielectric cap and a portion of the substrate. The etch (which may be a C5F8based etch) has a high selectivity (e.g., about 20:1) with respect to the HSQ-based dielectric layer, thereby enabling the etch to stop on the HSQ-based dielectric layer. Another etch removes the exposed HSQ-based dielectric layer to expose the substrate.

REFERENCES:
patent: 4997790 (1991-03-01), Woo et al.
patent: 5710073 (1998-01-01), Jeng et al.
patent: 5897372 (1999-04-01), Howard
patent: 6136700 (2000-10-01), McAnally et al.
patent: 6169039 (2001-01-01), Lin et al.
patent: 6433433 (2002-08-01), Sengupta
patent: 6472308 (2002-10-01), Mehta
patent: 6573168 (2003-06-01), Kim et al.

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