Etch stop layer for silicon (Si) via etch in...

Details Etch stop layer for silicon (Si) via etch in... Etch stop layer for silicon (Si) via etch in...

2006-12-12

2006-12-12

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S686000, C257S773000

Reexamination Certificate

active

07148565

ABSTRACT:
A method of forming a silicon (Si) via in vertically stacked wafers is provided with a contact plug extending from selected metallic lines of a top wafer and an etch stop layer formed prior to the contact plug. Such a method comprises selectively etching through the silicon (Si) of the top wafer until stopped by the etch stop layer to form the Si via; depositing an oxide layer to insulate a sidewall of the Si via; forming a barrier layer on the oxide layer and on the bottom of the Si via; and depositing a conduction metal into the Si via to provide electrical connection between active IC devices located on vertically stacked wafers and an external interconnect.

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“Face to Face Wafer Bonding for 3D Chip Stack Fabrication to Shorten Wire Lengths”, Jun. 27-29, 2000 VMIC Conference 2000 IMIC—200/00/0090(c).

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