Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2006-08-18
2009-08-11
Smith, Zandra (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257S499000, C257S774000, C438S706000, C438S714000
Reexamination Certificate
active
07573116
ABSTRACT:
A method used to fabricate a semiconductor device comprises etching a dielectric layer, resulting in an undesirable charge buildup along a sidewall formed in the dielectric layer during the etch. The charge buildup along a top and a bottom of the sidewall may reduce the etch rate thereby resulting in excessive etch times and undesirable etch opening profiles. To remove the charge, a sacrificial conductive layer may be formed to electrically short the upper and lower portions of the sidewall and eliminate the charge. In another embodiment, a gas is used to remove the charge. After removing the charge, the dielectric etch may continue. Various embodiments of the inventive process and structures are described.
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Chopra Dinesh
Howard Bradley J.
Micro)n Technology, Inc.
Patton Paul E
Smith Zandra
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