ESD shunt

Details ESD shunt ESD shunt

2000-06-02

2002-11-26

Jackson, Stephen W. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S058000, C361S111000, C361S118000

Reexamination Certificate

active

06487058

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the field of grounding or maintaining parts of sensitive electrical components at substantially the same potential. More particularly, this invention relates to a shunt or jumper for connecting pins or other electrical connectors in a sensitive electrical component.
BACKGROUND OF THE INVENTION
Electrostatic discharge (“ESD”) is a large problem in sensitive electrical devices. Electrostatic discharge can and will damage sensitive electrical devices. There is a long list of sensitive electrical devices that are used and manufactured each day. Microchips and microprocessors are just two classes of devices which may be ESD sensitive. A constant goal of microchip manufacturers is to miniturize the device. Some microprocessors have in excess of 10,000,000 devices on a single chip. The miniaturization of electronic components in semiconductor devices such as the integrated circuits of microchips, results in extremely small conductive paths or traces. In other words, miniaturization of microchips and more specifically the number of devices that can be housed in a microchip result in path widths less than 0.5 microinches. Currently, the electrical paths or traces have widths of 0.3 microinches. Of course, thinner path widths are contemplated in the future as the drive to further miniaturize integrated circuits continues. The thin conductive paths or traces are also spaced on close centers within a microprocessor or other semiconductor device. The spacing between conductors will also lessen as miniaturization continues. The close spacing makes components more vulnerable to voltage spikes or transients. These transients come in many forms, including a common form caused by an electrostatic buildup of charge on operators or equipment.
Miniaturization of the electrical paths within the components has reached a point where dissipation of static within the device may ruin the circuitry within the device. In devices having line widths less than 0.5 microinches, an electrostatic discharge from a jumper or shunt having 2000 volts of static electricity may cause a failure in the device. The failures take the form of ruined circuits or electromagnetic interference. The electrostatic discharge (ESD) travels through multiple coupling paths, which include circuits, grounds, and transient electromagnetic fields. An electrostatic discharge event starts with a very slow buildup of energy, often taking tens of seconds, followed by a very rapid breakdown.
Microprocessors with narrow line widths may not function after an ESD event. Many times the excessive voltage ruins the circuit. One solution to the problem has been to provide the circuit with filters capable of withstanding an ESD event. The filters pass ESD spikes to ground or absorb the ESD spike before it damages the circuit. Adding filters is contrary to miniaturization of semiconductor devices. Filters and the related connectors require space. The use of filters also adds to the cost of the semiconductor devices or components. Adding filters increases the complexity of circuit design. Increased complexity also makes incorporating changes to a circuit more difficult.
Another device that is ESD sensitive is magnetoresistive (MR) heads. MR heads are commonly used in devices that record data magnetically, such as a disc drive or a tape drive. An electrostatic discharge occurring between an MR head and another electrical component will, more than likely, ruin the head. In each disc drive or tape drive, typically there are a number of MR heads.
During the manufacture of any device having sensitive electrical devices, there are opportunities for an ESD event. For example, when manufacturing a disc drive, there are many times when ESD sensitive electronic parts are assembled and handled. One example is during the assembly of the actuator assembly. While manufacturing the actuator assembly, it is handled and tested several times.
Yet another problem associated with electrically sensitive devices is an electrical overstress (EOS). Many in the electronics industry use the acronyms ESD and EOS interchangeably. However, ESD is a specific subset of EOS, and is generally considered a handling and packaging problem. Electrical overstress (EOS) is a broad definition encompassing many potential sources and failure modes. There are two types of failures: catastrophic, which can usually be identified by testing prior to shipment, and latent, which is a malfunction caused by electrical overstress occurring during normal operation. Latent electrical overstress does not cause catastrophic failure, but is severe enough to actually weaken the part, diminishing the life of the assembly. Latent electrical overstress is currently a larger concern for device failures than ESD.
For example, an integrated circuit (IC) has three primary failure modes: metal burnout, junction shorts, and dielectric breakdown. Excessive current in the IC, which heats the metal through resistance heating, causes all three failures. Voltages exceeding the specific breakdown level of the gate oxide send current through the oxide, damaging metal oxide semiconductors (MOS). Any amount of current in the oxide causes sufficient heating to cause damage. This type of voltage sensitivity has resulted in “on chip” protection for most IC's that use MOS technology.
One way to avoid ESD and to lessen the possibility of EOS, is to place the shunts on circuits in an ionized environment. In the ionized environment, the static charges are dissipated. This solution is fine for a factory; however, many of the users do not have access to such an environment.
Many users are placing shunts on circuits in a home or work environment so this is less than optimal solution. Most shunts are soldered or hardwired to the electrical leads on the electrical device. Removing such shunts can be time consuming if the leads to which the shunt is attached must be maintained. Removal requires desoldering the connection between the lead and the shunt. The removal of solder or desoldering may also lead to electrical overstress and a latent defect. These takes time and may cause the leads to fail. In instances where keeping the leads is not critical, the leads and the shunt are mechanically removed. Once removed, the leads can not be used for testing the part for example.
What is needed is a method and apparatus, which prevents an ESD event or lessens the severity of an ESD event resulting from placing a jumper or shunt onto a circuit which, includes microprocessors or microchips. If the ESD event can be prevented or lessened, then failures in microchips having thin traces will be prevented or much less likely to occur. What is also needed is a device, which can be used to lessen or avoid the effects of EOS. What is also needed is a shunt which can be used in a home or work environment without resulting in a failed circuit. Still further what is needed is a shunt that can be placed across the leads of an electrically sensitive device and which will stay in place. In addition, what is needed is a shunt that can be easily removed without destroying electrical leads so that a part may be shunted to prevent electrostatic discharge during one phase of manufacture and which can be electrically tested using the electrical contacts which were previously shunted at a different time in the manufacturing process.
SUMMARY OF THE INVENTION
A method for placing several electrical portions of an electrical component at substantially the same electrical potential includes identifying electrical conductors which lead to a first electrical portion and separate electrical conductors which lead to a second electrical portion indium metal is placed across the leads of the first electrical portion and the leads of the second electrical portion. An indium metal wire may be placed across the leads of the first electrical portion and the leads of the second electrical portion. A sheet of indium metal foil may also be placed across the leads of the first electrical portion and the leads of th

Affiliated with

Also associated with

Rating

ESD shunt does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with ESD shunt, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ESD shunt will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2919763