Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2005-10-21
2008-08-26
Sherry, Michael J (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
Reexamination Certificate
active
07417837
ABSTRACT:
The present invention discloses an IC implemented with ESD protection system. In one embodiment, the includes a first device in a first power domain, and a second device in a second power domain. A buffer module is coupled between the first device and the second device for allowing a signal to pass across between the first and second devices during a normal operation, and for increasing an impedance between the first and second devices during an electrostatic discharge (ESD) event, thereby reducing a possibility of having an ESD current flow from the first device to the second device.
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patent: 6069782 (2000-05-01), Lien et al.
patent: 6693469 (2004-02-01), Prodanov
patent: 2006/0268474 (2006-11-01), Huang et al.
Hirokazu Hayashi et al., ESD Protection Design Using a Mixed-Mode Simulation for Advanced Devices, ESD Association, EOS/ESD Symposium 04-125, pp. 2B.4.1-2B.4.7.
Eugene. Worley, “Distributed Gate ESD Network Architecture for Inter-Power Domain Signals”, ESD Association, EOS/ESD Symposium 04-238, pp. 4B.1.1-4B.1.10.
K & L Gates LLP
Sherry Michael J
Taiwan Semiconductor Manufacturing Co. Ltd.
Thomas Lucy
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