ESD protection scheme for mixed-voltage CMOS integrated circuits

Details ESD protection scheme for mixed-voltage CMOS integrated circuits ESD protection scheme for mixed-voltage CMOS integrated circuits

1998-06-29

1999-12-14

Jackson, Stephen W

Electricity: electrical systems and devices

Safety and protection of systems and devices

Transient responsive

361 56, 361113, 361118, 361127, H02H 300

Patent

active

060025689

ABSTRACT:
In this invention, a whole-chip ESD protection scheme with the SCR string or the SCR/diode-mixed string are proposed to protect the mixed-voltage CMOS IC's against the ESD damage. The SCR string or the SCR/diode-mixed string is placed between the separated power lines. The ESD current is arranged to be discharged through the SCR string or the SCR/diode-mixed string and the ESD clamps between the power lines. Therefore, the internal circuits and the interface circuits between the circuits with different power supplies can be prevented from ESD damages. The number of the SCR's or the diodes in the SCR string or the SCR/diode-mixed string connected between the different power lines is dependent on the voltage difference between the different power supplies in the mixed-voltage CMOS IC's. When the IC is in the normal operating conditions, such SCR string or the SCR/diode-mixed string between the different power lines is kept off to maintain the independence of the power supplies in the mixed-voltage COMS IC.

REFERENCES:
patent: 5576557 (1996-11-01), Ker

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