ESD protection scheme

Details ESD protection scheme ESD protection scheme

1990-12-28

1993-03-23

DeBoer, Todd E.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, 361111, 257356, H02H 904

Patent

active

051969815

ABSTRACT:
An energy dissipation circuit for protecting a semiconductor integrated circuit from electrostatic discharge (ESD). The dissipation circuit provides an energy dissipation path between any combination of two pins of the semiconductor integrated circuit to be protected.

REFERENCES:
patent: 4066918 (1978-01-01), Heuner et al.
patent: 4151480 (1979-04-01), Carlson et al.
patent: 4870530 (1989-09-01), Hurst et al.
patent: 4897757 (1990-01-01), Tailliet et al.
patent: 5010380 (1991-04-01), Avery
patent: 5034845 (1991-07-01), Murakami

Affiliated with

Also associated with

Rating

ESD protection scheme does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with ESD protection scheme, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ESD protection scheme will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1356715