Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1994-02-02
1996-10-01
Gaffin, Jeffrey A.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 91, 361111, H02H 900
Patent
active
055615775
ABSTRACT:
ESD protection for an integrated circuit having a dirty ground is increased by including an SCR or other protection device from dirty ground to each pad whose driver uses dirty ground. The SCR or other protection device (if triggerable) is triggered by a sensing circuit that is referenced to dirty ground. If there is more than one dirty ground then the one that is used is the dirty ground that is associated with the pad to be protected. Pads not using a dirty ground may also be protected with respect to a dirty ground. A p-type substrate library cell for ESD protection of a pad may be developed that includes a first SCR from the pad to ground, a trigger circuit referenced to ground for the first SCR, a second SCR from the pad to a dirty ground, and a trigger circuit referenced that dirty ground for the second SCR. The trigger circuit for the library cell uses the presence or absence of V.sub.DD to provide high or low threshold voltages for triggering the SCR. For n-type substrates where V.sub.DD and DV.sub.DD take the place of GND and DGND, respectively, on-chip V.sub.DD cannot be allowed to select the threshold. An instance of a separate and isolated V.sub.DD brought into the IC on its own pin, and not otherwise used internally, can be used as the switching signal.
REFERENCES:
patent: 5140401 (1992-08-01), Ker
patent: 5239440 (1993-08-01), Merrill
patent: 5289334 (1994-02-01), Ker et al.
Gaffin Jeffrey A.
Hewlett--Packard Company
Jackson Stephen W.
Miller Edward L.
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