ESD protection designs with parallel LC tank for giga-hertz...

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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C361S113000

Reexamination Certificate

active

07009826

ABSTRACT:
An ESD protection circuit design incorporating a single, or a plurality of, parallel inductor and capacitor, also known as LC tank(s), to avoid power loss by parasitic capacitance in ESD circuits. The first design described incorporates a LC tank structure. The second includes two LC tank structures. These structures can be expanded to form ESD protection circuit structures stacked with n-stages LC tanks. The last design described is ESD protection circuits formed by stacking the first design. These designs can avoid power gain loss from parasitic capacitance of ESD, because the parameters of LC tank can be designed to resonant at a desired operating frequency. Each of these designs can be altered slightly to create variant designs with equal identical ESD protection capabilities.

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patent: 2005/0184344 (2005-08-01), Ker et al.

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