ESD protection circuit located under protected bonding pad

Details ESD protection circuit located under protected bonding pad ESD protection circuit located under protected bonding pad

1994-08-29

1997-07-29

Gaffin, Jeffrey A.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, 361111, 361118, H02H 900

Patent

active

056526890

ABSTRACT:
A circuit for protecting a bonding pad of a semiconductor device from ESD voltages is located under the pad to permit the space otherwise used for a protection circuit to be used for normal operating components. The protection circuit has a compact layout that provides maximum ability to handle an ESD current within this limited space. The semiconductor structure for the circuit has separate parts for two SCR circuits, one for each polarity of ESD current. Each SCR circuit comprises two symmetrical SCR structures.

REFERENCES:
patent: 4733285 (1988-03-01), Ishioka et al.
patent: 4803541 (1989-02-01), Kouda
patent: 4806999 (1989-02-01), Strauss
patent: 5182220 (1993-01-01), Ker et al.

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