ESD protection circuit for use in RF CMOS IC design

Details ESD protection circuit for use in RF CMOS IC design ESD protection circuit for use in RF CMOS IC design

2005-05-17

2005-05-17

Nguyen, Patricia (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including protection means

C327S314000

Reexamination Certificate

active

06894567

ABSTRACT:
An improved method is presented for adding ESD protection to large signal MOS circuits. Each of the ESD and the MOS devices are separately connected off chip to rigid voltage points, thereby eliminating additional capacitive loading of MOS devices.An improved RF MOS amplifier is presented which implements the method of the invention. An ESD device, comprising back to back diodes, is connected to the Vdd and GND nodes off chip, thus insulating the amplifying transistor from any performance degradative interaction with the ESD device due to transient forward biasing.The method and apparatus are easily extended to circuits comprising any number of MOS devices.

REFERENCES:
patent: 5276370 (1994-01-01), Nishiura et al.
patent: 5393991 (1995-02-01), Kawakami
patent: 5740000 (1998-04-01), Stackhouse et al.
patent: 5969929 (1999-10-01), Kleveland et al.
patent: 5973897 (1999-10-01), Opris et al.
patent: 6291964 (2001-09-01), Chen et al.
patent: 6400204 (2002-06-01), Davis
patent: 20010015881 (2001-08-01), Takikawa et al.

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