ESD protection circuit for MOS integrated circuits

Details ESD protection circuit for MOS integrated circuits ESD protection circuit for MOS integrated circuits

1988-11-01

1990-05-01

Shoop, Jr., William M.

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific voltage responsive fault sensor

361 92, 361111, 357 2313, 307561, H02H 904

Patent

active

049223712

ABSTRACT:
An ESD protection circuit, suitable for use as part of an integrated circuit, limits the voltage potential at the contacts of the integrated circuit to a voltage potential difference range relative to, though extending beyond the voltage source potentials of the circuit protected. The ESD protection is effective regardless of whether the integrated circuit is powered. The ESD protection circuit includes a clamp subcircuit for limiting the voltage potential at a clamp point to a first voltage range approximately defined by the voltage source potentials and a voltage offset subcircuit, coupled between the clamp point and an integrated circuit contact, to establish a second voltage range encompassing the first voltage range. The voltage offset subcircuit conducts current between the clamp point and the contact to limit the voltage potential at the contact to the second voltage range.

REFERENCES:
patent: 3712995 (1973-01-01), Steudel
patent: 3879640 (1975-06-01), Schade, Jr.
patent: 3999205 (1976-12-01), Stewart
patent: 4131928 (1978-12-01), Davis et al.
patent: 4158863 (1979-06-01), Naylor
patent: 4626882 (1986-12-01), Cottrell

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