ESD protection circuit for differential I/O pair

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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C361S091100, C361S111000

Reexamination Certificate

active

07974053

ABSTRACT:
An ESD protection circuit for a differential I/O pair is provided. The circuit includes an ESD detection circuit, a discharge device, and four diodes. The first diode is coupled between the first I/O pin and the discharge device in a forward direction toward the discharge device. The second diode is coupled between the second I/O pin and the discharge device in a forward direction toward the second I/O pin. The third diode is coupled between the discharge device and the positive power line in a forward direction toward the positive power line. The fourth diode is coupled between the discharge device and the negative power line in a forward direction toward the discharge device. Via an output end, the ESD detection circuit triggers the discharge device during ESD events.

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patent: 2006/0132996 (2006-06-01), Poulton
Ker, M.-D et al., “ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applications,” Aug. 2000, pp. 1194-1199, vol. 35, No. 8, IEEE J. Solid-State Circuits.

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