ESD protection circuit and display panel using the same

Details ESD protection circuit and display panel using the same ESD protection circuit and display panel using the same

2006-09-19

2006-09-19

Jackson, Stephen W. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C257S170000, C257S360000, C257S355000, C257S357000, C257S361000, C349S040000, C349S054000

Reexamination Certificate

active

07110229

ABSTRACT:
An ESD protection circuit for low temperature poly-silicon thin film transistor panel and a display panel using the same. The feature of the ESD protection circuit comprises an ESD detection circuit disposed between a first power line and a second power line, for outputting an enable signal when an ESD event occurs in the first power line; and a discharge device having a control terminal coupled to the output of the ESD detection circuit, for providing a discharge path between the first and second power lines when the control terminal receives the enable signal.

REFERENCES:
patent: 5528188 (1996-06-01), Au et al.
patent: 5946177 (1999-08-01), Miller et al.
patent: 6538708 (2003-03-01), Zhang
patent: 6552879 (2003-04-01), Voldman
patent: 2002/0066929 (2002-06-01), Voldman

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