ESD protection apparatus having floating ESD bus and semiconduct

Details ESD protection apparatus having floating ESD bus and semiconduct ESD protection apparatus having floating ESD bus and semiconduct

1998-02-02

2000-01-04

Kim, Jung Ho

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327309, 327583, 327439, 327453, 361 56, 361111, 361118, H03K 508

Patent

active

060114207

ABSTRACT:
An apparatus for protecting an integrated circuit against damage from electrostatic discharges (ESD) includes a single ESD bus that is connected to multiple input pads through a respective diode. The ESD bus is isolated from the positive power supply bus V.sub.DD. The ESD bus is coupled to the negative power supply bus V.sub.SS by a FET-triggered SCR circuit. ESD charge on an input pad forward biases the respective diode and charges the ESD bus. When the voltage of the ESD bus reaches a predetermined threshold voltage, the FET breaks down, and triggers the SCR circuit to shunt the charge on the ESD bus to V.sub.SS. The threshold voltage is selected such that, in normal operation, voltages higher than V.sub.DD may be applied to the input pad without input leakage current.

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