ESD protecting circuit and manufacturing method thereof

Details ESD protecting circuit and manufacturing method thereof ESD protecting circuit and manufacturing method thereof

2006-08-11

2009-10-06

Tran, Minh-Loan T (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Device protection

C257S328000, C257S355000, C257S360000, C257S546000, C361S090000, C361S091100

Reexamination Certificate

active

07598538

ABSTRACT:
An ESP protecting circuit and a manufacturing method thereof are provided. The ESP protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a third high-concentration impurity region of a complementary type, first and second conductive wells, and a fourth conductive impurity region. The ESD protecting circuit is configured as a field transistor without a gate electrode, and the high breakdown voltage characteristics of the field transistor are lowered by implanting impurity ions, providing an ESD protecting circuit with a low breakdown voltage and low leakage current. Because the leakage current is reduced, the ESD protecting circuit can be used for an analog I/O device that is sensitive to current fluxes. Also, an N-type well may protect a junction of the field transistor.

REFERENCES:
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patent: 5324982 (1994-06-01), Nakazato et al.
patent: 5856214 (1999-01-01), Yu
patent: 6433395 (2002-08-01), Hsu
patent: 6498357 (2002-12-01), Ker et al.
patent: 6855586 (2005-02-01), Walker et al.
patent: 2003/0197226 (2003-10-01), Chen et al.

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