ESD low resistance input structure

Details ESD low resistance input structure ESD low resistance input structure

1988-07-06

1989-10-17

Pellinen, A. D.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, 361 92, 361111, 357 2313, 307544, 307557, H02H 904

Patent

active

048751308

ABSTRACT:
An input protection structure effectively protects input circuitry from positive-going ESD pulses. The input protection structure includes a transistor having a reduced beta, connected in series with one or more diodes between the input pin and VCC. In one embodiment, the transistor having reduced beta is constructed in the same manner as a fuse device. The structure is formed in an integrated fashion, without the need for metallic interconnections within the structure itself, thereby decreasing impedance while minimizing surface area in the integrated surface.

REFERENCES:
patent: 3787717 (1974-01-01), Fischer et al.
patent: 4366522 (1982-12-01), Baker
patent: 4400711 (1983-08-01), Avery
patent: 4712152 (1987-12-01), Iio
patent: 4763184 (1988-08-01), Krieger et al.

Affiliated with

Also associated with

Rating

ESD low resistance input structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with ESD low resistance input structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ESD low resistance input structure will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1747078