ESD circuit for input which exceeds power supplies in normal ope

Details ESD circuit for input which exceeds power supplies in normal ope ESD circuit for input which exceeds power supplies in normal ope

1989-07-28

1991-07-16

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 2313, 361 91, H01L 2978

Patent

active

050327429

ABSTRACT:
An integrated circuit which, for ESD protection at an input pad, uses a split series resistor, with two clamping diodes of different types. By splitting up the series resistance in this fashion, some impedance is provided before the first hard diode, without causing an excessive total impedance. When a positive-going transient appears at the pad, the current is limited only by a moderate impedance (which saves area); when a negative-going transient appears, the current is limited by a much higher impedance (which allows a lower leakage current to be achieved).

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Electronics--"Advances in C-MOS Technology", 5-15-75, pp. 80-82.
Gimber, Electronics Industry--"A COS/MOS Dual NAND Buffer Circuit", 7-78, pp. 19-22.

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