ESD breakdown prevention protection circuit

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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Details

C361S111000, C361S091100

Reexamination Certificate

active

07113378

ABSTRACT:
A semiconductor device of the invention prevents a breakdown of a gate oxide film, while restraining an area of a protection circuit to enlarge, without substantially involving a modification of a manufacturing process. The semiconductor device includes an electrostatic breakdown preventing protection circuit made up of an input line electrically connecting an input terminal to an input circuit, a first power supply line connected to a first power supply terminal, a first MOSFET, and a first protection circuit. A drain electrode of the first MOSFET is connected to the input line, a source electrode and a substrate electrode thereof are connected to the first power supply line, and the gate electrode thereof is connected to a voltage control circuit. The voltage control circuit is connected to bridge the input line and the power supply line. The voltage control circuit controls the potential of the gate electrode of the first MOSFET to a potential between the potential of the drain electrode and the potential of the source electrode so that the protection circuit prevents a breakdown of the gate oxide film by an electrostatic surge.

REFERENCES:
patent: 6507469 (2003-01-01), Andoh
patent: 06-104721 (1994-04-01), None
patent: 06-310715 (1994-11-01), None
patent: 06-334443 (1994-12-01), None
patent: 2001-358297 (2001-12-01), None
patent: 2003-60058 (2003-02-01), None

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