Error-tolerant binary encoder

Details Error-tolerant binary encoder Error-tolerant binary encoder

1994-06-30

1996-09-17

Williams, Howard L.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341 94, H03M 136

Patent

active

055572758

ABSTRACT:
Encoder for the conversion of a signal of thermometric or cyclic type including a set of n Exclusive OR gates (X1, Xi, . . . , Xn) and an encoding matrix with n rows (1 . . . n) and a plurality of pairs of columns for a differential output of one bit of the binary signal, a matrix in which a row/column coupling is produced by a transistor (T). A pair of pseudo-columns of order zero is coupled to the rows in a way comparable to the coupling of the pair of columns of order 1, but by applying a cyclic shift in respect of the rank of the rows (rows of rank i of the pseudo-columns of order zero, coupled like the rows of rank (i modulo n)+1 of the columns of order 1). The bit of order zero [Bo] is obtained at the output of an additional Exclusive OR gate the inputs of which respectively receive the logic signal [Bo*] output by the pair of pseudo-columns of order zero, and the logic signal [B1] output by the pair of columns of order one.

REFERENCES:
patent: 4270118 (1981-05-01), Brokaw
patent: 4774498 (1988-09-01), Traa
patent: 4870417 (1989-09-01), van de Plassche et al.
patent: 5083126 (1992-01-01), Komatsu et al.
patent: 5119098 (1992-06-01), Komatsu et al.
van de Plassche et al., "An 8-Bit 100-MHz Full Nyquist Analog-to-Digital Converter", IEEE Journal of Solid State Circuits, vol. 23, No. 6, Dec. 1989, pp. 1338-1341.

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