Error tolerant addressing system and method for noisy ATM links

Details Error tolerant addressing system and method for noisy ATM links Error tolerant addressing system and method for noisy ATM links

1996-09-17

1999-08-17

Tu, Trinh L.

Excavating

370353, 370397, H03M 1300, H04L 1228

Patent

active

059404159

ABSTRACT:
A system and method for reliable transmission of information using asynchronous transfer mode (ATM) through a noisy transmission path such as a wireless or satellite transmission link. To efficiently adapt ATM to such wireless links requires the ability to discern ATM cell addresses in a high noise environment. The system and method provides multiple redundant addressing to reduce or eliminate misrouting of ATM cells transferred through such a noisy transmission link. The multiple redundancy addressing realizes multiple virtual circuits to the same destination. The multiple redundant addresses for the circuits are within the error space of a principal address used for actual transmission. Thus, the most probable error patterns occurring in the ATM address field will change the principal address to a redundant address to the same destination, thus avoiding misrouting of the ATM cell.

REFERENCES:
patent: 5144619 (1992-09-01), Munter
patent: 5323389 (1994-06-01), Bitz et al.
patent: 5440552 (1995-08-01), Sugita
patent: 5568651 (1996-10-01), Medina et al.
patent: 5610921 (1997-03-01), Christensen

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