Error signal isolator circuit

Details Error signal isolator circuit Error signal isolator circuit

1992-11-30

1995-02-07

Pellinen, A. D.

Electrical transmission or interconnection systems

Switching systems

Condition responsive

332109, 323280, H03K 708

Patent

active

053878221

ABSTRACT:
An error signal isolator circuit for conveying an error signal across an electrical isolation boundary such as an external pulse transformer employs a level shifting process whereby a controllable voltage is measured with respect to a reference voltage and, with any gain implemented in the process, is level shifted upward such that the higher potential is referenced to a supply voltage and the lower potential is used dynamically to control the magnitude of voltage conveyed in a pulse amplitude modulation (PAM) process. In the PAM process, an ON pulse is terminated by monitoring when a PAM current has increased to a predetermined and controllable level. An ON pulse is initiated by monitoring when the voltage across a clamp diode has decayed below its normal forward bias level, indicating a commensurate decay in PAM current, following termination of the previous ON pulse.

REFERENCES:
patent: 4599571 (1986-07-01), Matsuno
patent: 4672300 (1987-06-01), Harper
patent: 4692598 (1987-09-01), Yoshida et al.
patent: 4716510 (1987-12-01), Pace et al.
patent: 5113158 (1992-05-01), Tsuji et al.
patent: 5264782 (1993-11-01), Newton

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