Error reduction method and apparatus for a direct digital synthe

Details Error reduction method and apparatus for a direct digital synthe Error reduction method and apparatus for a direct digital synthe

1989-12-01

1990-12-04

Shoop, Jr., William M.

Coded data generation or conversion

Converter compensation

341147, 364721, H03M 106

Patent

active

049756990

ABSTRACT:
A circuit for generating an analog sine voltage from a digital phase input (11) employing a memory (13) storing sine and cosine values and a correction value for each phase and first and second digital-to-analog converters (DACs) (19,21). For each digital phase input (N), selected sine and cosine values are combined and the result is read out to the first DAC (19), which generates an analog sine approximation voltage. A corresponding correction value is simultaneouosly read out to the second DAC (21), whose output is scaled by an attenuator (23) to provide a correction voltage for correcting the deviation in the output voltage of the first DAC (19) from the ideal sine voltage value.

REFERENCES:
patent: 4476536 (1984-10-01), Jones
patent: 4809205 (1989-02-01), Freeman

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