Error recovery scheme for destaging cache data in a multi-memory

Details Error recovery scheme for destaging cache data in a multi-memory Error recovery scheme for destaging cache data in a multi-memory

1988-10-14

1990-04-24

Atkinson, Charles E.

Excavating

364200, 371 511, G06F 1110, G06F 1116

Patent

active

049205366

ABSTRACT:
In a data processing system in which a processor has a cache receiving data staged from at least two main memories. Performance is enhanced by providing an indicator identifying the main memory from which data is staged. When data in the cache is destaged, the indicator is used to direct the destaged data to the proper main memory. If an error occur in the indicator, the data will be destaged to each main memory where a check is made on the address of the data to determine whether the main memory is the source of the destaged data. The data is stored in a main memory only if the memory is the source thereof.

REFERENCES:
patent: 4525777 (1985-06-01), Webster et al.
patent: 4654819 (1987-03-01), Stiffler et al.

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