Error rate measuring apparatus

Details Error rate measuring apparatus Error rate measuring apparatus

1995-11-07

1997-07-29

Beausoliel, Jr., Robert W.

Excavating

371 54, 371 671, G06F 1100

Patent

active

056527608

ABSTRACT:
An error rate measuring apparatus includes a demodulator, and data from the demodulator is applied to a decoding circuit in which an error bit number is evaluated for each of a BIC portion and a packet portion. In the BIC portion, if a synchronization is settled, the error bit number is evaluated by comparing received BICs and a predetermined BIC pattern, and if the synchronization is not settled, the error bit number is determined as eight (8) bits. In the packet portion, if a frame synchronization is settled and decoding is successful, the error bit number is calculated by comparing data before decoding and data after decoding with each other. If the frame synchronization is settled but the decoding is unsuccessful, a presumed error bit number is set according to the number of packets being decoded successfully in a first time horizontal direction, and if the frame synchronization is not settled, a predetermined error bit number is set. In each of the BIC portion and the packet portion, a bit error rate is calculated on the basis of the error bit number for each measurement range, and displayed on a monitor.

REFERENCES:
patent: 5148431 (1992-09-01), Hayashi
patent: 5455536 (1995-10-01), Kono et al.
patent: 5473615 (1995-12-01), Boyer et al.

Affiliated with

Also associated with

Rating

Error rate measuring apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Error rate measuring apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Error rate measuring apparatus will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-637977