Error protected data transfer system and method

Information security – Access control or authentication – Network

Reexamination Certificate

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Details

C713S181000, C713S154000, C726S019000, C726S004000

Reexamination Certificate

active

07039947

ABSTRACT:
Data transfer between a secure computer and a number of input/output units occurs via a bus control unit connected to the secure computer and a serial bus system. The bus control unit cyclically activates the input/output units connected to the bus system and transfers multi-bit message to the respective activated input/output unit. In order to produce a data transfer method which enables security/related signals to be transmitted via a non-error-protected bus system, at least one of the input/output units is designed as a security unit. Further, the multi-bit message transferred to the security unit has at least one checkbit. The security unit interprets the transferred multi-bit message as correct only if the checkbit alternates within a predefined monitoring period.

REFERENCES:
patent: 5596588 (1997-01-01), Nobutoki et al.
patent: 5673389 (1997-09-01), Weber et al.
patent: 6466539 (2002-10-01), Kramer et al.
patent: 3441227 (1989-09-01), None
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patent: 4433013 (1996-03-01), None
patent: 19629868 (1998-02-01), None
patent: 0216372 (1996-08-01), None
patent: 0837394 (1998-04-01), None
Hertel, Jurgen, “Absolut sicheres Geleit”, 18 Messen & Pruefen Automatisieren 31 (1995) Oct., No. 10, Kaufering, DE.

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