Error limiting analog to digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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H03M 136

Patent

active

050722212

ABSTRACT:
A parallel analog-to-digital converter having comparators in a sequence with two sets of logic gates having inputs electrically connected to selected primary and complementary outputs of the comparators.

REFERENCES:
patent: 3221324 (1965-11-01), Margopoulos
patent: 3425054 (1969-01-01), Cowan
patent: 3537101 (1970-10-01), Campanella et al.
patent: 3877025 (1975-04-01), Maio
patent: 4644322 (1987-02-01), Fujita
patent: 4739306 (1988-04-01), Tung
patent: 4884075 (1989-11-01), Mangelsdorf
"The Behavior of Flip-Flops Used as Synchronizers and Prediction of Their Failure Rate," H. Veendrick, IEEE Journal of Solid-State Circuits, vol. SC-15, No. 2, Apr. 1980.
"Prediction of Error Probabilities for Integrated Digital Synchronizers, " J. Hohl, W. Larsen, L. Schooley IEEE Journal of Solid-State Circuits, vol. SC-19, No. 2, Apr. 1984.
"A 6-Bit/200-MHz Full Nyquist A/D Converter," B. Zojer, R. Petschacher, W. Luschnig, IEEE Journal of Solid-State Circuits, vol. SC-20, No. 3, Jun. 1985.

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