Error free data transfers

Details Error free data transfers Error free data transfers

1994-08-03

1997-01-28

Elmore, Reba I.

395492, 395555, G06F 1342, G06F 13372

Patent

active

055985521

ABSTRACT:
A novel circuit is provided which allows a storage register to load data from another register utilizing a store signal which is asynchronous to the clock signal used to store data in the first register. A novel store circuit is provided which provides a control signal in response to a store signal, which conditionally loads data into the storage register. The contents of the storage register is either maintained or overwritten, depending upon the relationship of the store signal to the clock signal.

REFERENCES:
patent: 4152777 (1979-05-01), Baker
patent: 4181974 (1980-01-01), Lemay et al.
patent: 4370712 (1983-01-01), Johnson et al.
patent: 4390969 (1983-06-01), Hayes
patent: 4509115 (1985-04-01), Manton et al.
patent: 4587609 (1986-05-01), Boudreau et al.
patent: 4616338 (1986-10-01), Helen et al.
patent: 4858107 (1989-08-01), Fedele
patent: 4868737 (1989-09-01), Soederlund
patent: 4873630 (1989-10-01), Rusterholz et al.
patent: 4884234 (1989-11-01), Keys et al.
patent: 4977537 (1990-12-01), Dias et al.
patent: 5255381 (1993-10-01), Chinnaswamy et al.
patent: 5261046 (1993-11-01), Shope et al.

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