Error disbursing format for digital information and method for o

Excavating

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371 2, G06F 1110

Patent

active

048021709

ABSTRACT:
Multiple stage interleaving through a memory matrix is utilized to separate adjacently disposed bits from bytes of digital information, in a reorganized bit stream. At least two stages of interleaving are required for the preferred embodiments of the invention which achieves a bit separation distance equal to the bit capacity of a plurality of either the matrix columns or rows, with that plurality being the number of adjacently disposed bits in each byte of digital information.

REFERENCES:
patent: 4393414 (1983-07-01), Reitmeier
patent: 4425644 (1984-01-01), Scholz
patent: 4441184 (1984-04-01), Sonoda

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