Error detection system

Details Error detection system Error detection system

1979-04-11

1982-04-20

Smith, Jerry

Excavating

364741, 371 49, G06F 1110, G06F 1116

Patent

active

043262910

ABSTRACT:
In a throughput error detection system, a redundant logic unit is provided along with a required logic unit for simultaneous operation therewith. The required logic unit and redundant logic unit both produce output data which, it is desired, will be the same. The output data from the required logic unit is supplied to a data bus and the output data of the redundant logic unit is supplied to a parity check digit generator. From the data received from the redundant logic unit, the parity check digit generator generates a parity check digit which is applied to the data bus along wih the data from the required logic unit. A parity checking circuit receives the data and the parity check digit from the data bus and a calculation is made by the circuit to determine if parity is correct. If parity is not correct, the checking circuit produces an alarm signal to alert a user.

REFERENCES:
patent: 3303482 (1967-02-01), Jenkins
patent: 3476922 (1969-11-01), Yiotis
patent: 3531631 (1970-09-01), Burgess
patent: 3599146 (1971-08-01), Weisbecker

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