Error detection in digital systems

Communications: electrical – Digital comparator systems

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Details

325 41, G06F 1110, G08C 2500

Patent

active

041211952

ABSTRACT:
This invention relates to error detecting arrangements for digital transmission systems. It is particularly applicable to systems in which the line signals are already arranged in or can be converted into a format resulting in what may be termed constant accumulated disparity signals. In a digital transmission system parity information is included so as to cause a toggle in a repeater to take up a particular state immediately following each parity check. This state will only change when an error occurs, or an odd number of errors. When an error has occurred and the toggle has changed its state the new state becomes the normal state and a further change indicates a further error. No special line code is needed and circuitry in the repeater is kept to a minimum. For a binary system it requires an extra digit to be added at reasonable intervals, e.g. after every 100 bits.

REFERENCES:
patent: 3405235 (1968-10-01), Carter
patent: 3439330 (1969-04-01), Sipress et al.
patent: 3611141 (1971-10-01), Waters
patent: 3646517 (1972-02-01), Waters
patent: 3810111 (1974-05-01), Patel
patent: 3825892 (1974-07-01), Catchpole
patent: 3842401 (1974-10-01), Smith, Jr. et al.

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