Error detection and correction circuit

Details Error detection and correction circuit Error detection and correction circuit

1990-09-10

1993-10-05

Beausoliel, Jr., Robert W.

Excavating

371 377, G06F 1110

Patent

active

052512193

ABSTRACT:
The present invention (10) substantially overcomes many of the problems associated with prior art error detection codes by providing a novel approach to detecting and correcting multiple bit errors. The invention (10) organizes the data word into a matrix of n by m bits, where n is the number of m bit groups. Parity bits are generated for each column and each row and used to detect single, double and triple bit errors.

REFERENCES:
patent: 4495623 (1985-01-01), George et al.
patent: 4688225 (1987-08-01), Fukami et al.
patent: 4760576 (1988-07-01), Sako
patent: 4958350 (1990-09-01), Worley, III et al.
patent: 5068855 (1991-11-01), Kashida et al.
Peterson et al., Error Correcting Codes, 2nd Edition, The MIT Press, .COPYRGT.1972.

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