Multiplex communications – Wide area network – Packet switching
Patent
1993-10-20
1995-08-29
Marcelo, Melvin
Multiplex communications
Wide area network
Packet switching
370 60, 370 79, H04J 324, H04L 1226
Patent
active
054467268
ABSTRACT:
An adaptive error detection and correction apparatus for an Asynchronous Transfer Mode (ATM) network device comprises a sensing unit for sensing a congestion condition in the ATM network and a global pacing rate unit for adaptively reducing a maximum allowable transmission ratio of ATM cells containing information to idle ATM cells in response to a sensed congestion condition. A processor stores a number corresponding to a relatively high maximum allowable transmission ratio in the global pacing rate register in the absence of a sensed congestion condition, and stores a number corresponding to a relatively low maximum allowable transmission ratio in the global pacing rate register in response to a sensed congestion condition. A controller adjusts the maximum allowable transmission ratio in accordance with the number stored in the global pacing rate register. A plurality of peak pacing rate counters reset to predetermined values upon decrementation to zero, the predetermined values corresponding to service intervals for segmentation of Conversion Sublayer Payload Data Unit (CD-PDU)s. The processor further comprises means for assigning the counters to selected CD-PDUs, and sensing the counters to determine whether or not segmentation of said selected CD-PDUs is within the respective service intervals. The apparatus further comprises a channel group credit register having bits corresponding to the respective counters.
REFERENCES:
patent: 4939724 (1990-07-01), Ebersole
patent: 5072442 (1991-12-01), Todd
patent: 5157662 (1992-10-01), Tadamura
patent: 5214650 (1993-05-01), Renner
patent: 5313454 (1994-05-01), Bustini et al.
Rostoker Michael D.
Stelliga D. Tony
LSI Logic Corporation
Marcelo Melvin
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