Error detecting system

Details Error detecting system Error detecting system

1982-11-22

1985-04-23

Smith, Jerry

Excavating

371 51, G06F 1110

Patent

active

045134200

ABSTRACT:
A method and apparatus for storing data in which the data is checked for an error without requiring the data to include an error correction code. Included in the system is a logic circuit for dividing a data word by a polynomial during the time the data word is being written into the primary memory unit resulting in the generation of a remainder which is stored in an auxiliary memory unit. When reading the data word from the primary memory unit, the data word is again divided by the same polynomial and the remainder compared with the remainder stored in the auxiliary memory unit. If the remainders match, no error was introduced during the storing of the data in the main memory unit. If the remainders do not match, an error is indicated. This system allows a data word to be stored in a main or primary memory unit without requiring the word to include error correction bytes.

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Lewin, Theory and Design of Digital Computer Systems, 1980, p. 348.
Peterson & Weldon, Error-Correcting Codes, 2nd edition, 1972, MIT Press, pp. 357-373.

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