1994-08-01
1997-12-30
Chung, Phung
Excavating
371 572, 371 55, G06F 1100
Patent
active
057034095
ABSTRACT:
An error counting circuit is adapted to count a number of code errors of a main signal in an external apparatus which is coupled to an optical transmission path. The error counting circuit includes an error counter which counts error pulses received from the external apparatus and indicative of the number of code errors of the main signal in response to clock pulses having a predetermined period and outputting a counted value for each the predetermined period, and a mechanism for stopping a counting operation of the error counter when a power failure of the external apparatus occurs, so that an erroneous counting operation of the error counter is prevented.
REFERENCES:
patent: 3827030 (1974-07-01), Seipp
patent: 4241450 (1980-12-01), Blatter et al.
patent: 4506386 (1985-03-01), Ichikawa et al.
patent: 4523231 (1985-06-01), Therrien
patent: 4601057 (1986-07-01), Tsuji et al.
patent: 4742518 (1988-05-01), Shedd
Fukumitsu Katsumi
Takada Tadayuki
Chung Phung
Fujitsu Limited
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