Excavating
Patent
1985-03-26
1987-06-09
Fleming, Michael R.
Excavating
371 38, G06F 1110
Patent
active
046726128
ABSTRACT:
An error correction system for a difference set cyclic (272, 190) code with 190 data bits and 82 test bits in a packet which is transmitted on a vertical blanking interval of a television signal has been improved. The present system comprises a buffer memory for storing an original data which is subject to correction and corrected data, and an error correction circuit having at least a syndrome register, a majority circuit and a data register. The data transfer between the buffer memory and the error correction circuit is effected by wired logic hardware means without using software operation time of a programmed computer so that computer operation time is not wasted merely for error correction. A correction number counter is provided for counting the number of corrected bits for adjusting the threshold level for determining 1 or 0 of a reception signal, adjusting criterion of operation of the majority circuit in the error correction circuit, and the stopping of error correction operation in case of too many errors.
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Sase Ichiro
Shishikura Hirohisa
Ueguri Shigeharu
Yamada Osamu
Yanagimachi Akio
Fleming Michael R.
Nippon Hoso Kyokai
Novack Martin M.
Oki Electric
Victor Co.
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