Error correction system for digital to analog converters

Coded data generation or conversion – Converter compensation

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Details

341131, 341144, H03M 106

Patent

active

049671979

ABSTRACT:
A high resolution digital to analog conversion system using a medium resolution converter compensated for error correction. The errors of more significant bits are stored in a memory during correction mode and recalled during normal operation. The errors are evaluated by comparing the binary weighted currents of a sub-DAC with corresponding reference currents and stored in the memory. The comparing operation is exercised by sequential approximation method for fast execution and simpler circuitry.

REFERENCES:
patent: 4465996 (1984-08-01), Boyacigiller et al.
patent: 4647907 (1987-03-01), Storey

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