Error correction system for differential phase-shift-keying

Details Error correction system for differential phase-shift-keying Error correction system for differential phase-shift-keying

1978-07-19

1980-07-08

Atkinson, Charles E.

Excavating

371 43, G06F 1112

Patent

active

042119960

ABSTRACT:
An error correcting system for DPSK is comprised of an encoder unit, a decoder unit and a transmission medium disposed between the encoder and decoder units. The encoder includes a differential encoder for differentially encoding an input data sequence, an error correcting encoder for adding a check digit sequence to the differentially encoded data sequence, and a differential decoder for differentially decoding the data sequence added with the check digit sequence. The decoder unit includes a differential encoder for differentially encoding a received data sequences, an error correcting decoder for correcting error digits contained in the differentially encoded received data sequence, and a differential decoder for differentially decoding the output data sequence from the error correcting decoder. The transmission medium typically includes a differentially encoded phase-shifting-keying modulator unit and a differentially encoded phase-shift-keying demodulator unit.

REFERENCES:
patent: 3891959 (1975-06-01), Tsuji et al.
patent: 3990009 (1976-11-01), Lentz
patent: 4035767 (1977-07-01), Chen et al.
patent: 4128828 (1978-12-01), Samejima et al.
Forney, Jr. and Bower, A High-Speed Sequential Decoder: Prototype Design and Test, IEEE Trans. on Comm. Technology, vol. COM-19, No. 5, Oct. 1971, pp. 821-835. _
Chen and Rutledge, Error Correcting Codes for Satellite Comm. Channels, IBM J. Res. Develop., Mar. 1976, pp. 168-175.

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