Error correction method for the transfer of blocks of data bits,

Details Error correction method for the transfer of blocks of data bits, Error correction method for the transfer of blocks of data bits,

1985-07-25

1986-06-03

Atkinson, Charles E.

Excavating

G06F 1110

Patent

active

045933952

ABSTRACT:
For an error correction method for the transfer of word-wise arranged data, two word correction codes are used successively, each code acting on a group of words while, therebetween, an interleaving step is performed. The actual transfer takes place by means of channel words for which purpose there are provided a modulator and a demodulator. Invalid channel words are provided with an invalidity bit in the demodulator. During the (possibly correcting) reproduction of the data words, the invalidity bits can be used in one of the two error corrections in various ways:

REFERENCES:
patent: 4238852 (1980-12-01), Iga et al.
patent: 4281355 (1981-07-01), Wada et al.
patent: 4306305 (1981-12-01), Doi et al.
patent: 4356564 (1982-10-01), Doi et al.

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