Error correction method and apparatus

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371 39, 371 36, G06F 1110

Patent

active

045190798

ABSTRACT:
Circuitry and a method for correcting errors in binary data which is stored n memory and subject to errors upon recall therefrom. The technique involves generating a redundant byte related to each original byte to be stored, storing both bytes in memory, and applying the recalled bytes to a decoder designed to correct the errors. If more than a single adjacent error per byte is expected, it is necessary to transpose the bits of the original and redundant bytes before storage so that the bits thereof alternate, and re-transpose the recalled bytes to their original sequence before application to the said decoder.

REFERENCES:
patent: 3825893 (1974-07-01), Bossen et al.
patent: 4211997 (1980-07-01), Rudnick et al.
patent: 4238852 (1980-12-01), Iga et al.

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