1996-05-29
2000-01-25
Baker, Stephen M.
Excavating
H03M 1300
Patent
active
060171464
ABSTRACT:
A demodulating circuit demodulates a received signal, and outputs patterns of demodulated data and reliability information bits indicating correctness of the demodulated data. These are supplied to first and second shift registers (4 and 5), respectively. When the number of reliability information bits of Level 1 in the second shift register is a predetermined value or less, a shift operation is repeated a plurality of times. When a reliability information bit of Level 1 is outputted, an error correction control circuit (7) successively outputs all possible bit patterns of the demodulated data An EXOR gate (10) generates all possible patterns of demodulated data An error correcting circuit (11) carries out error correction for all the patterns. When the number is larger than the predetermined value, the error correction is carried out only for the demodulated data supplied from the demodulating circuit in a conventional manner.
REFERENCES:
patent: 4519080 (1985-05-01), Snyder
patent: 4763331 (1988-08-01), Matsumoto
patent: 5432822 (1995-07-01), Kaewell, Jr.
Kaneko Hiroshi
Kimura Kazuhiro
Masumoto Takahiko
Yamashita Syugo
Baker Stephen M.
Sanyo Electric Co,. Ltd.
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